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MIPS architecture
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#	Item
221	SYSTEM V APPLICATION BINARY INTERFACE MIPS RISC Processor Supplement 3rd Edition Add to Reading List Source URL: refspecs.linux-foundation.org Language: English - Date: 2013-05-29 14:41:04 System V Unix MIPS Technologies Instruction set architectures MIPS architecture Application binary interface UnixWare Santa Cruz Operation Reduced instruction set computing Computer architecture Computing System software
222	SYSTEM V APPLICATION BINARY INTERFACE MIPS RISC Processor Supplement 3rd Edition Add to Reading List Source URL: refspecs.linuxfoundation.org Language: English - Date: 2013-05-29 14:41:04 System V Unix MIPS Technologies Instruction set architectures MIPS architecture Application binary interface UnixWare Santa Cruz Operation Reduced instruction set computing Computer architecture Computing System software
223	SYSTEM V APPLICATION BINARY INTERFACE MIPS RISC Processor Supplement 3rd Edition Add to Reading List Source URL: refspecs.linuxbase.org Language: English - Date: 2013-05-29 14:41:04 System V Unix MIPS Technologies Instruction set architectures MIPS architecture Application binary interface UnixWare Santa Cruz Operation Reduced instruction set computing Computer architecture Computing System software
224	Microsoft PowerPoint - Nintendo 64 Architecture.pptx Add to Reading List Source URL: meseec.ce.rit.edu Language: English - Date: 2014-05-08 16:15:34 R4200 RCP Video game console Sega Saturn MIPS architecture Reduced instruction set computing Nintendo Entertainment System RDRAM 64-bit Computer hardware Humanities Nintendo 64
225	The Emotion Engine and Vector Unit Design Add to Reading List Source URL: www.cs.nyu.edu Language: English - Date: 2002-05-20 07:51:40 Central processing unit Parallel computing Classes of computers Microprocessors Emotion Engine SIMD Superscalar MIPS architecture Coprocessor Computer architecture Computer hardware Computing
226	Design and Evaluation of a RISC Processor with a Tomasulo Scheduler Diplomarbeit Lehrstuhl f¨ur Rechnerarchitektur Add to Reading List Source URL: www.kroening.com Language: English - Date: 2014-05-11 10:55:21 Classes of computers Algorithms Tomasulo algorithm DLX Out-of-order execution Central processing unit Reduced instruction set computing MIPS architecture Instruction pipeline Computer architecture Computing Instruction set architectures
227	Wolfsberg Guidance on Mobile and Internet Payment Services (MIPS[removed]Preamble Add to Reading List Source URL: www.wolfsberg-principles.com Language: English - Date: 2014-02-17 12:14:31 Finance Financial regulation MIPS architecture Electronic commerce Money laundering Terrorism financing Bank Factoring Credit risk Business Economics Payment systems
228	Microsoft Word - OCDemon MIPS-Freescale Final1.doc Add to Reading List Source URL: www.macraigor.com Language: English - Date: 2011-05-22 19:16:30 Electronics Instruction set architectures Microcontrollers Power Architecture IEEE standards Joint Test Action Group MIPS Technologies GNU Debugger PowerPC Computer architecture Computing Embedded systems
229	MODULE TITLE: Computer Hardware and Organisation MODULE CODE: Add to Reading List Source URL: cis.ulster.ac.uk Language: English - Date: 2013-06-11 05:26:52 Computing Microprocessors Microarchitecture Embedded system Computer science Parallel computing Computer MIPS architecture Software Computer architecture Central processing unit Computer hardware
230	CASM Simulator Synthesis & Model Verification of the MIPS I architecture Specification Implementation Add to Reading List Source URL: www.complang.tuwien.ac.at Language: English - Date: 2013-02-01 06:50:41 Hazard Central processing unit Instructions per second ALGOL 68 Software engineering Computing Programming language theory MIPS architecture

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